In general, a package substrate has a form in which a first substrate having a memory chip attached thereto and a second substrate having a processor chip attached thereto are connected as one.
The package substrate has advantages in that, as the processor chip and the memory chip are manufactured as one package, the mounting area of the chips can be reduced, and a signal can be transmitted at a high speed through a short path.
Due to this advantage, the package substrate is widely used in mobile devices, and the like.
FIG. 1 is a sectional view illustrating a package substrate according to a related art.
Referring to FIG. 1, the package substrate includes a first substrate 20 and a second substrate 20 attached onto the first substrate 20.
The first substrate 20 includes a first insulating layer 1, circuit patterns 4 formed on at least one surface of the first insulating layer 1, a second insulating layer 2 formed on the first insulating layer 2, a third insulating layer 3 formed under the first insulating layer 1, a conductive via 5 formed inside at least one of the first insulating layer 1, the second insulating layer 2, and the third insulating layer 3, a pad 6 formed on an upper surface of the second insulating layer 2, a plurality of bonding pates 7 formed on the pad 6, a memory chip 8 formed on at least one bonding paste 7 among the plurality of bonding pastes 7, a first protective layer 10 exposing a partial upper surface of the pad 6 therethrough, and a second protective layer 9 formed on the first protective layer 10 to cover the memory chip 8.
In addition, the second substrate 30 includes a fourth insulating layer 11, a circuit pattern 12 formed on at least one surface of the fourth insulating layer 11, a pad 13 formed on at least one surface of the fourth insulating layer 11, a conductive via 14 formed inside the fourth insulating layer 11, a processor chip 15 formed on the fourth insulating layer 11, an electrode 16 formed on the processor chip 15, and a connection member S connecting the electrode 16 to the pad 13.
The package substrate according to the related art shown in FIG. 1 illustrates a schematic view of a package on package (PoP) to which a through mold via (TMV) technology based on a laser technology is applied.
According to the TMV technology, after the first substrate 20 is molded, a conductive via connected to a pad is formed through a laser process, and accordingly, a solder ball (bonding paste) is printed in the conductive via.
In addition, the second substrate 30 is attached onto the first substrate 20 by the printed solder ball.
However, the related art has a limitation in forming a fine pitch because the first substrate is connected to the second substrate using the solder ball.